Modern semiconductor devices are typically multi-layered, having numerous metalization layers separated by numerous insulating oxides and interconnected with vias or contact holes. For instance, an interconnect for a typical multi-layer device is formed by depositing and patterning a first metal layer over the device, depositing an intermediate oxide over the patterned first metal layer, photolithographically defining a contact hole in the oxide, and depositing a second metal layer over the oxide that fills the contact hole and contacts the patterned first metal layer.
Patterning the first metal layer produces metal steps or undulations between where the first metal is removed and where the first metal remains. Because the intermediate oxide layer is a conformal layer, the oxide layer tracks these undulations. Accordingly, if the second metal layer were also deposited directly over the intermediate oxide layer, the undulations from the first metal layer would undesirably appear in the second metal layer.
Undulations in the second metal layer complicate patterning of the second metal layer, especially in high resolution, fine line-width applications, because no single focal plane exists on the second metal layer. A non-planar second metal layer, therefore, undesirably increases the line-widths produceable in the second metal layer. Furthermore, if the second metal layer undulations are large (e.g., on the order of the thickness of the second metal layer), voids or open circuits may form in the second metal layer. These problems may propagate to subsequently deposited material layers.
To prevent step or undulation propagation, the intermediate oxide layer is preferably planarized, removing any steps or undulations formed therein, prior to deposition of the second metal layer. Planarization is typically performed mechanically by forcing the semiconductor wafer face down against a semi-porous polishing pad which is saturated with an abrasive compound (i.e., a slurry) and by rotating the polishing pad relative to the wafer. The rotary motion between the polishing pad and the wafer mechanically removes layers of the intermediate oxide and is continued until the oxide steps or undulations are removed. This process is generally referred to as a chemical mechanical polishing (CMP).
To facilitate material removal during the CMP process the polishing pad is provided with grooves that channel slurry to the polishing pad/wafer interface, and that provide a path for wafer material to be removed from the polished wafer surface. During polishing, however, the downward force of the wafer against the polishing pad compacts slurry particles within these grooves, reducing the supply of fresh slurry to the polishing pad/wafer interface, the removal rate of wafer material, and the overall polishing efficiency and throughput of the CMP process, as well as giving rise to defects in the form of wafer scratches as described below. Additionally, the downward force of the wafer against the polishing pad causes the semi-porous surface of the polishing pad to pack down, causing polishing rates to become low and unpredictable, and necessitating frequent polishing pad replacement.
To extend the useful life of a polishing pad, a pad conditioner that roughens or "conditions" the polishing pad surface is employed insitu, while the polishing pad polishes a wafer; or ex-situ, after wafer polishing is complete. A typical pad conditioner comprises a diamond surface that continually roughens the polishing pad surface by scribing additional "microgrooves" in the polishing pad surface. Continuous roughening of the polishing pad surface ensures adequate abrasion (e.g., due to slurry saturation of the roughened surface) at the polishing pad/wafer interface. (See, for example, U.S. Pat. No. 5,216,843 to Breivogel et al.).
While pad conditioners significantly increase a polishing pad's abrasive lifetime, they do not address the problem of slurry debris (e.g., compacted, dried slurry) within the slurry grooves. In fact, during the polishing/conditioning process, the compacted slurry material which fills the pad's original grooves maybe freed in large chunks that can scratch and produce defects in the polished wafer. Thus the polishing process itself can become a defect source.
Accordingly a need exists for a CMP apparatus and method that both extends the useful life of a polishing pad and eliminates wafer scratches caused by compacted slurry material.